Hynix Announces 800MHz, 1GB/2GB UDIMM Validation

ICHEON, Korea  January 16th, 2008  Hynix Semiconductor Inc. ('Hynix') today announced the validation per Intel procedures and specifications, of the 1GB (HMP112U6DFR8C), and 2GB (HMP125U6DFR8C), DDR2, 800MHz Un-buffered DIMMs (UDIMM) both assembled with 54nm 1Gb DRAM components. Hynix��s 54nm 1 Gb DDR2 DRAM component was validated in November of last year.
Hynix is one of the first suppliers in the industry to develop a 50nm-class process technology.
The finer process design-rule of this 54nm product reduces die size by approximately 40% compared to 60nm-class process technology, significantly improving speed-power characteristics. Assembly of modules in all form-factors is simplified as a result of the smaller package sizes of the components. Hynix ��three-dimensional transistor�� architecture and ��W-DPG (Tungsten-Dual Poly Gate)�� technologies minimizes current leakage to further reduce overall power consumption, a key requirement in end use applications

This 54nm technology will be used to manufacture both DDR2 and DDR3 DRAM components in 1Gb and 2Gb densities beginning in the second half of this year.
DeDios Associates estimates DDR3 SDRAM share of bit consumption at 4% in 2008 and bit cross-over in late 2009. PCs, Servers, consumer and communications applications are expected to adopt DDR3 SDRAM over the next 2 years to take advantage of the low-power and higher speed characteristics offered by this next generation technology.
With growing demand for high capacity memory, Hynix plans to consistently enhance production capacity on the 54nm products to meet customer demand.